Code Paths【免费下载链接】cannbot-skillsCANNBot 是面向 CANN 开发的用于提升开发效率的系列智能体本仓库为其提供可复用的 Skills 模块。项目地址: https://gitcode.com/cann/cannbot-skillsUse this file when you already know the topic and need to find the implementation path quickly. Do not read the whole repository first.Device family mappingUse this mapping before interpreting hardware-specific branches:device_type 950- C310device_type.startswith(b)- C220ineasyasc/resources/tensorutils.h,__DAV_C310__corresponds to950ineasyasc/resources/tensorutils.h,__DAV_C220_CUBE__corresponds tob*do not invert this mapping when reading support checks, helper selection, or generated code pathsCommon Questions - FilesRepository structure or contributor architecturetop-level layout:agent/references/repo-map.mdcontributor architecture and subsystem ownership:doc/11_architecture_for_contributors.mdPublic DSL surfacearchitecture-specific exports:easyasc/a2.py,easyasc/a5.pytreata2anda5as parallel architecture surfaces for different instruction sequences, not as compatibility layers of each otherstable vec authoring rule for a5: usevf(),micro, sort-family ops, orub_to_ub; do not treat raweasyasc.a5exports as permission to write generic vec math directly in the kernel bodystable vec authoring rule for a2: direct vec ops in the kernel body are normal, butvf()andmicroare unavailabledecorators:easyasc/decorators.pyflow helpers:easyasc/flowcontrol.pysyntax sugar / AST rewrites:easyasc/pythonic.pynative Pythonif/elif/elseinsidekernelare rewritten into DSLwith If(...),with Elif(...), andwith Else()blocks before instruction captureprefer native Python control flow in kernels and kernel-focused tests; inspecteasyasc/flowcontrol.pyonly when you need the emittedstart_if/start_elif/start_else/end_ifdetailsregression/example:testcases/simulator/bridge/test_sim_nested_if_elif_else.pyruntime entry andOpExec(..., simulator...)backend selection:easyasc/torchplugin.pysimulatorTrue,simulatorv2, andsimulatorlegacycurrently all route to the V2 runtime throughKernelBase.run_sim()simulator mode does not emit generated code artifacts; if you only want codegen output, usesimulatorFalse, gen_onlyTrueKernel and micro execution wrapperskernel lifecycle / generation hooks:easyasc/kernelbase/kernelbase.py(see## KernelBase method mapbelow for a per-method index)simulator entry:KernelBase.run_sim()-_run_sim_v2()auto bridge selection:build_simulator_v2_program()micro module lifecycle:easyasc/micro/micromodule.pyLowering pipelinemain lowering entry:easyasc/parser/asc.pypruning and cleanup:easyasc/parser/asc_pruning.pyautosync insertion:easyasc/parser/asc_autosync.pyop-specific lowering:easyasc/parser/asc_handlers/Simulator pathfocused simulator map:agent/references/simulator-v2.mdruntime root:easyasc/simulator_v2/runtime activation and core/lane planning:easyasc/simulator_v2/runtime/execution_plan.pyparent runtime coordinator:easyasc/simulator_v2/runtime/global_runtime.pyper-core child process wrapper:easyasc/simulator_v2/runtime/core_process.pyper-core runtime:easyasc/simulator_v2/runtime/core_runtime.pydefault narrow linear bridge:easyasc/simulator_v2/compat/kernel_bridge.pycontrol-flow bridge for looped / mixed-lane kernels:easyasc/simulator_v2/compat/control_flow_bridge.pyV2 lane-level control interpreter and local event execution:easyasc/simulator_v2/runtime/control_actor.pydynamicget_bufslot selection for loop-carried DBuff/TBuff/QBuff access is bridged here and resolved at runtime herecreate_varlist,GetValueFrom, andSetValueToalso route through this control-flow path, including dynamicVarListindex resolutionfloatVararithmetic on control-flow paths (var_add,var_mul,var_div) is also executed here and must stay float when the sourceVaris floatV2 shared tensor and workspace storage:easyasc/simulator_v2/memory/V2 local bank allocation and per-core local-memory capacity checks:easyasc/simulator_v2/memory/local_memory.py, wired fromeasyasc/simulator_v2/runtime/core_runtime.pyV2 threaded pipe-worker lifecycle and pipe-local state retention:easyasc/simulator_v2/runtime/pipe_worker.py,easyasc/simulator_v2/ops/dispatch.pyvec mask state such asset_mask/reset_maskpersists here across sequential V-pipe tasks on the same laneV2 lane-local event-bank semantics forcreate_sevent/create_devent/event_wait/event_set:easyasc/simulator_v2/sync/local_events.pypluseasyasc/simulator_v2/runtime/control_actor.pyV2 pre-dispatch pipe-task memory-range validation for tensor-touching execution paths including shared-tensor helpers (fill_shared,copy_shared), all current cube-pipe ops (gm_to_l1_nd2nz,set_constant_to_l1,l1_to_l0,mmad,l0c_to_*,cube_m_*), vec datamoves, V-pipe tensor ops such as packedcompare/select, repeat-layout vec ops,sort32,mergesort*,gather,scatter, plus task-level micro shared-tensor ops andcall_microdry-run validation:easyasc/simulator_v2/runtime/task_memory_validator.py, called fromeasyasc/simulator_v2/runtime/pipe_worker.pyV2 vec execution helpers:easyasc/simulator_v2/ops/vec/V2 micro runtime:easyasc/simulator_v2/ops/micro/runtime.pyfloatVararithmetic insidecall_microexecution is resolved here again; if avf()scale unexpectedly becomes0, inspect this file before blaming cube/vec handoffV2 Chrome-trace export path:easyasc/simulator_v2/trace/chrome.pyA5 cycle-model profile / estimator path for simulator-side timing traces:easyasc/simulator_v2/timing/Stub emitters and shortcutsoperation emitters:easyasc/stub_functions/high-level matmul helpers:easyasc/shortcuts/matmul.pyRuntime types and helper objectstensors, vars, regs, enums, instruction models:easyasc/utils/Test organization and runnable demosmanual/demo runners:agent/example/demo/a2/,agent/example/demo/a5/historical note: thetestcases/tree has been removed from the delivered skill bundle; references totestcases/...elsewhere in this file describe historical regression coverage onlyKernelBase method mapeasyasc/kernelbase/kernelbase.pyis a single ~1.5k-line file holding theKernelBaseclass. Use this map to jump by method; prefer the method name over the line number when the file has shifted.Construction and call__init__(L25) — store name/func/vector_mode; init instruction, mutex, workspace, and used-micro state__call__(L41) — bind args and run the wrapped function to emit instructionsDeveloper-facing dumpsprint_instructions(L133) — print the captured instruction listdump_asc(L141) — writepath_cube.hpath_vec.hfromtranslate_splitdump_kernel(L149) — writepath_cube.hpath_vec.hpath.cppentry with optionaldebug_entryCANN op-host and op-project scaffoldinggenerate_op_host(L304) — writename_tiling.hname.cpp(infoshape, tiling, op registration); requires the kernel to have been called oncegenerate_op_project(L571) — unpackCustomOp*.tar.gz(a2 vs a5 bydevice_type), materializeCMakePresets.jsonandbuild.sh_resolve_op_host_block_dim(L280) /_resolve_debug_chipset(L291) — device-type helpers for op-host output_resolve_custom_opp_path(L629) — normalize vendor opp install pathSimulator V2 orchestrationrun_sim(L638) — public simulator entry; routes to_run_sim_v2_analyze_usage_for_simulator_v2(L641) — pre-run usage inspectionbuild_simulator_v2_program(L655) — auto-select linear vs control-flow bridge_has_control_flow_instructions(L675) — bridge-selection predicateresolve_simulator_v2_config(L695) — produce V2 runtime config_iter_bound_gmtensors(L711) — iterate bound GM inputs/outputs in order_copy_gmtensor_data_into_v2_runtime(L719) /_copy_v2_runtime_tensor_back(L746) — host - V2 runtime tensor marshalling_run_sim_v2(L759) — build program, execute, copy tensors back, optional traceCodegen emission (CANN deliverables)_emit_kernel_sources(L786) — shared op-kernel writer reused bygenerateandgenerate_debug(emits used-micro headers, thendump_kernel)_generate_debug_main(L801) — Cmain.cppfor the debug workspace (optionalprofilehooks)_generate_debug_bashfiles(L1008) — debugb.sh/r.shgenerate(L1030) — full CANN op project (generate_op_projectgenerate_op_host_emit_kernel_sourcesgenerate_aclnn_testgenerate_bashfiles)generate_debug(L1088) — standalone debug workspace (copiesdebug/resources, emitsmain.cpp, CMake)generate_aclnn_test(L1145) — aclnn test harness subdirectorygenerate_bashfiles(L1458) — build/run shell for the full projectTopic LookupAutosync or event-order issuesagent/references/constraints/autosync.mdeasyasc/parser/asc_autosync.pyeasyasc/simulator_v2/compat/control_flow_bridge.pyfor control-flow kernels, where V2 first splits cube/vec streams and injects autosync events before building lane programseasyasc/simulator_v2/runtime/control_actor.pyfor V2 same-lane event execution and threaded pipe completion atevent_setboundarieseasyasc/parser/asc_handlers/relevant simulator pipe/runtime files undereasyasc/simulator_v2/Tiling or capacity legalityagent/references/constraints/tiling.mdeasyasc/shortcuts/matmul.pyrelevant kernel example fromagent/references/examples/kernel-catalog.mdagent/scripts/estimate_matmul_datamove.pyDevice-specific kernel surface rulesagent/references/constraints/a5-device.mdfor a5 vec-side authoring limitsagent/references/constraints/a2-device.mdfor a2 missing features and bridge ruleseasyasc/a5.pyandeasyasc/a2.pyonly after the focused constraint file is no longer enoughCounter lifetime or buffer ownershipagent/references/constraints/counters.mdtarget kernel source inagent/example/kernels/lowering/runtime files only if behavior is still unclearPrecision or cast placementagent/references/constraints/precision.mdeasyasc/utils/matching lowering handler undereasyasc/parser/asc_handlers/simulator runtime if the question is execution-specificTail handling or partial-tile writesagent/references/constraints/tail-safety.mdmatching kernel example inagent/example/kernels/parser/simulator files if codegen/runtime behavior is in doubtParser-side dead-code or pruning behavioreasyasc/parser/asc_pruning.pyrelated tests undertestcases/Shape binding ambiguityeasyasc/torchplugin.pymatching tests undertestcases/affected kernel runner inagent/example/kernels/Concrete trigger: when two scalar Var parameters have the same value at runtime (e.g.S1 S2), the framework cannot distinguish which scalar maps to which tensor dimension. Fix: useshape_bindingsinOpExec(...)()call, or ensure test shapes use distinct values for potentially ambiguous parameters.a2-specific cube → vec pathagent/references/constraints/a2-device.md— missing features and data pathagent/references/patterns/a2-cube-vec.md— GM workspace bridge patternagent/references/constraints/vec-reduction-a2.md— cmax brcb for row maxagent/references/constraints/vec-stride.md— continuous vs sliced vec opsagent/example/kernels/a2/flash_attn_score.py— working reference kernela2-specific pure vec elementwise / quantization kernelsagent/references/constraints/a2-vec-kernel.md— pure vec kernel structure, flag flow, reinterpret, exact roundingagent/references/constraints/mask.md— current vec mask semantics when masking is truly neededagent/references/constraints/vec-stride.md— only if wide/narrow row interaction appearsagent/example/kernels/a2/to_hif8_torch.py— working vec-only quantization referencea2-specific cube → vec → cube delayed pipelineagent/references/constraints/a2-device.md— both bridge restrictions (L0C - GM - UBandUB - GM - L1)agent/references/patterns/a2-cube-vec-cube.md— one-tile lookahead schedule, sharedL0C, delayed consumeragent/references/constraints/vec-reduction-a2.md— running row-max update in[M,1]scalar formatagent/references/constraints/vec-stride.md— slicedsubagainst narrow row-max broadcastagent/example/kernels/a2/flash_attn_score_pv.py— complete reference kernela2-specific cube → vec → cube → vec delayed numerator accumulationagent/references/constraints/a2-device.md— all three bridge restrictions plus scalar-state copy warningagent/references/patterns/a2-cube-vec-cube-vec.md— one-tile lookahead with delayed final vec accumulationagent/references/constraints/vec-reduction-a2.md— running max delayedexpdiffin[M,1]scalar formatagent/references/constraints/vec-stride.md— sliced scaling of[M,128]accumulators by narrow[M,8]broadcastsagent/example/kernels/a2/flash_attn_unnorm.py— complete reference kernel with explicit local-event handoff for the finalaccum_ubstore/reuse edgea2-specific cube → vec → cube → vec normalized online softmaxagent/references/constraints/a2-device.md— same triple-bridge hardware limits plus scalar-state copy warningagent/references/patterns/a2-cube-vec-cube-vec-softmax.md— one-tile lookahead with runningrow_max, runningrow_sum, delayedexpdiff, and final divideagent/references/constraints/online-softmax-tail.md— score-domain-infmasking rule for non-alignedS2tailsagent/references/constraints/reduction.md— online softmax update order and sum before cast ruleagent/references/constraints/vec-reduction-a2.md—cadd/brcbrow-sum pattern and final sliceddivagent/references/constraints/vec-stride.md— sliced division of[M,128]accumulators by[M,8]broadcastsagent/example/kernels/a2/flash_attn_full.py— complete normalized reference kernel with explicit local-event handoff for the finalaccum_ubstore/reuse edgeagent/example/kernels/a2/flash_attn_full_pj_hif8.py— contract-first hif8 variant withto_hif8_torch(p * 128) / 128, validated non-alignedS2tail handling, explicit local-event handoff for the finalaccum_ubstore/reuse edge, separate plain-Tensorvec scratch forub_score/ub_pv, and exported finalrowmax/rowsumagent/example/kernels/a2/flash_attn_full_pj_hif8_commonub.py— same math and outputs as item 8, but rewrites the vec scratch into sharedDBufflineage (ub_score_pvscore_pv_cnt) so the vecMTE2 - Vubinedge follows slot-bufferDEvent-style queueing; use this when studying why the shared local-buffer version overlaps better without mergingstage1_cntandstage2_cntagent/example/kernels/a2/flash_attn_full_pj_hif8_causal.py— left-up causal extension of the scaled-hif8 probability path, now also moved onto the shared vec-sideDBufflineage (ub_score_pvscore_pv_cnt) so the diagonal-tile causal kernel keeps the same improvedMTE2 - Vubinqueueing as the non-causalcommonubbaseline while preservingactive_tiles_n Min(tiles_n, lmt 1)and exportedrowmax/rowsumagent/example/kernels/a2/flash_attn_full_pj_half_block32_causal.py— contract-first half value-path variant withpv_j p_j.half().float() v_j.float(), floatrow_sum, blockwise causal maskingfloor(k_pos / 32) floor(q_pos / 32), diagonal-tile packed-bit masks with32/64valid-column thresholds per subblock half, and the same shared vec-sideDBufflineage (ub_score_pvscore_pv_cnt) to improve localubinqueueing while preservingactive_tiles_n Min(tiles_n, lmt 1)and exportedrowmax/rowsumGenerated host-side scalar dtype or project generationeasyasc/kernelbase/kernelbase.py— see## KernelBase method mapto jump to the right emitter (generate,generate_op_host,generate_aclnn_test,_generate_debug_main, ...)templates/resources undereasyasc/resources/related parser handlers if the generation path crosses loweringTest organization or test-asset lookuptestcases/README.mdrelevant tests or co-located sample assets undertestcases/agent/example/demo/a2/oragent/example/demo/a5/only if the target is intentionally manual or integration-styleReading RulePrefer:one focused constraint/reference fileone implementation-path file or directory from this mapone test or source exampleDo not jump into broad contributor architecture docs first unless the smaller path still leaves the question ambiguous.【免费下载链接】cannbot-skillsCANNBot 是面向 CANN 开发的用于提升开发效率的系列智能体本仓库为其提供可复用的 Skills 模块。项目地址: https://gitcode.com/cann/cannbot-skills创作声明：本文部分内容由AI辅助生成（AIGC），仅供参考